CPUs, Memory, and the System Bus

CPUs, Memory, and the System Bus

processor bus:capacitybus:processor. <Italics>See<Default Para Font> processor bus<$nopage>CPU:relation to bus and memorymultiprocessor architectureA Challenge/Onyx system contains from 2 to as many as 36 CPUs. All are functionally identical. The CPUs are connected to each other and to a single memory by the processor bus. The processor bus carries 128-bit parallel packets at a data rate of 1.2 Gigabytes/second. An important feature of the bus design is that it is "fair," that is, there is a very low probability of any CPU on it starving for access. This helps to make real-time program timings determinate and repeatable.

IRIX:kernelkernel:multiprocessor usememory:mainThere is a single physical memory (shown as "main memory" in Figure 2-1) that is accessed equally by all CPUs. For example, there is a single image of the UNIX kernel in memory, and any of the CPUs could be executing instructions from it, in any combination, at any time.